ST STM32G471

Basic timers (TIM6/TIM7) RM0440
1452/2126 RM0440 Rev 4
Figure 485. Counter timing diagram, internal clock divided by 4
Figure 486. Counter timing diagram, internal clock divided by N
MSv62301V1
0000 0001
0035
0036
tim_psc_ck
tim_cnt_ck
Counter register
Update event (UEV)
Counter overflow
Update interrupt flag
(UIF)
CEN
MSv62302V1
00
1F
20
tim_psc_ck
tim_cnt_ck
Counter register
Update event (UEV)
Counter overflow
Update interrupt flag
(UIF)