ST STM32G471 User Manual

RM0440 Rev 4 787/2126
RM0440 Operational amplifiers (OPAMP)
829
The bit OPAEN enables and disables the OPAMP operation. The OPAMP registers
configurations must be changed before enabling the OPAEN bit in order to avoid spurious
effects on the output.
When the output of the operational amplifier is no more needed the operational amplifier can
be disabled to save power. All the configurations previously set (including the calibration)
are maintained while OPAMP is disabled.
25.3.3 Initial configuration
The default configuration of the operational amplifier is a functional mode where the three
input/outputs are connected to external pins. In the default mode the operational amplifier
uses the factory trimming values for its offset calibration. The trimming values can be
adjusted, see Section 25.3.7: Calibration for changing the trimming values. The default
configuration uses the normal mode, which provides the standard performance. The bit
OPAHSM can be set in order to switch the operational amplifier to high-speed mode for a
better slew rate. Both normal and high-speed mode characteristics are defined in the
datasheet.
As soon as the OPAEN bit in OPAMPx_CSR register is set, the operational amplifier is
functional. The two input pins and the output pin are connected as defined in Section 25.3.4:
Signal routing and the default connection settings can be changed.
Note: The inputs and output pins must be configured in analog mode (default state) in the
corresponding GPIOx_MODER register.
25.3.4 Signal routing
The routing for the operational amplifier pins is determined by OPAMPx_CSR and
OPAMPx_TCMR registers.
The connections of the six operational amplifiers (OPAMPx, x = 1...6) are described in the
table below.
Table 200. Operational amplifier possible connection
Signal Pin Internal Comment
OPAMP1_VINM
PA3 (VINM0)
PC5 (VINM1)
OPAMP1_VOUT or PGA controlled by bits PGA_GAIN and VM_SEL
OPAMP1_VINP
PA1 (VINP0)
PA3 (VINP1)
PA7 (VINP2)
DAC3_CH1 controlled by bit VP_SEL.
OPAMP1_VOUT PA2
ADC1_IN3
ADC1_IN13
(1)
The pin is connected when the OPAMP is
enabled and OPAMP internal output is
disabled. The ADC input is controlled by ADC
OPAMP2_VINM
PA5 (VINM0)
PC5 (VINM1)
OPAMP2_VOUT or PGA controlled by bits PGA_GAIN and VM_SEL
OPAMP2_VINP
PA7 (VINP0)
PB14 (VINP1)
PB0 (VINP2)
PD14 (VINP3)
- controlled by bit VP_SEL

ST STM32G471 Specifications

General

Brand	ST
Model	STM32G471
Category	Microcontrollers
Language	English