RM0440 Rev 4 627/2126
RM0440 Analog-to-digital converters (ADC)
724
Note: The regular trigger selection cannot be changed on-the-fly.
The injected trigger selection can be anticipated and changed on-the-fly. Refer to
Section 21.4.21: Queue of context for injected conversions on page 634
Each ADC master shares the same input triggers with its ADC slave as described in
Figure 97.
Figure 97. Triggers sharing between ADC master and ADC slave
Table 163 to Table 166 give all the possible external triggers of the three ADCs for regular
and injected conversion.
MSv46156V1
adc_ext_trg0
adc_ext_trg31
EXTSEL[3:0]
ADC MASTER
adc_ext_trg1
adc_jext_trg0
adc_jext_trg31
Injected sequencer
triggers
adc_jext_trg1
JEXTSEL[4:0]
External regular trigger
External injected trigger
EXTSEL[3:0]
ADC SLAVE
JEXTSEL[4:0]
External regular trigger
External injected trigger
..............
.......
.......
Regular sequencer
triggers
Table 163. ADC1/2 - External triggers for regular channels
Name Source Type EXTSEL[4:0]
adc_ext_trg TIM1_CC1 Internal signal from on-chip timers 00000
adc_ext_trg1 TIM1_CC2 Internal signal from on-chip timers 00001
adc_ext_trg2 TIM1_CC3 Internal signal from on-chip timers 00010
adc_ext_trg3 TIM2_CC2 Internal signal from on-chip timers 00011
adc_ext_trg4 TIM3_TRGO Internal signal from on-chip timers 00100
adc_ext_trg5 TIM4_CC4 Internal signal from on-chip timers 00101
adc_ext_trg6 EXTI line 11 External pin 00110
adc_ext_trg7 TIM8_TRGO Internal signal from on-chip timers 00111
adc_ext_trg8 TIM8_TRGO2 Internal signal from on-chip timers 01000