ST STM32G471 User Manual

Low-power timer (LPTIM) RM0440
1482/2126 RM0440 Rev 4
Bits 29,
15,14,13
TRIGSEL[3:0]: Trigger selector
The TRIGSEL bits select the trigger source that will serve as a trigger event for the LPTIM among
the below 13 available sources:
0000: lptim_ext_trig0
0001: lptim_ext_trig1
0010: lptim_ext_trig2
0011: lptim_ext_trig3
0100: lptim_ext_trig4
0101: lptim_ext_trig5
0110: lptim_ext_trig6
0111: lptim_ext_trig7
1000: lptim_ext_trig8
1001: lptim_ext_trig9
1010: lptim_ext_trig10
1011: lptim_ext_trig11
1100: lptim_ext_trig12
Others: Reserved
See Section 32.4.2: LPTIM input and trigger mapping for details.
Bit 12 Reserved, must be kept at reset value.
Bits 11:9 PRESC[2:0]: Clock prescaler
The PRESC bits configure the prescaler division factor. It can be one among the following division
factors:
000: /1
001: /2
010: /4
011: /8
100: /16
101: /32
110: /64
111: /128
Bit 8 Reserved, must be kept at reset value.
Bits 7:6 TRGFLT[1:0]: Configurable digital filter for trigger
The TRGFLT value sets the number of consecutive equal samples that should be detected when a
level change occurs on an internal trigger before it is considered as a valid level transition. An
internal clock source must be present to use this feature
00: any trigger active level change is considered as a valid trigger
01: trigger active level change must be stable for at least 2 clock periods before it is considered as
valid trigger.
10: trigger active level change must be stable for at least 4 clock periods before it is considered as
valid trigger.
11: trigger active level change must be stable for at least 8 clock periods before it is considered as
valid trigger.
Bit 5 Reserved, must be kept at reset value.

ST STM32G471 Specifications

General

Brand	ST
Model	STM32G471
Category	Microcontrollers
Language	English