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ST STM32G471

ST STM32G471
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RM0440 Rev 4 315/2126
RM0440 Reset and clock control (RCC)
338
Bits 31:9 Reserved, must be kept at reset value.
Bit 8 UCPD1EN: UCPD1 clock enable
Set and cleared by software.
0: UCPD1 clock disable
1: UCPD1 clock enable
Bits 7:2 Reserved, must be kept at reset value.
Bit 1 I2C4EN: I2C4 clock enable
Set and cleared by software
0: I2C4 clock disabled
1: I2C4 clock enabled
Bit 0 LPUART1EN: Low power UART 1 clock enable
Set and cleared by software.
0: LPUART1 clock disable
1: LPUART1 clock enable

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