Filter math accelerator (FMAC) RM0440
488/2126 RM0440 Rev 4
18.3.2 Local memory and buffers
The unit contains a 256 x 16-bit read/write memory which is used for local storage:
• Input values (the elements of the input vectors) are stored in two buffers, X1 and X2.
• Output values (the results of the operations) are stored in another buffer, Y.
• The locations and sizes of the buffers are designated as follows:
– x1_base: the base address of the X1 buffer
– x2_base: the base address of the X2 buffer
– y_base: the base address of the Y buffer
– x1_buf_size: the number of 16-bit addresses allocated to the X1 buffer
– x2_buf_size: the number of 16-bit addresses allocated to the X2 buffer
– y_buf_size: the number of 16-bit addresses allocated to the Y buffer.
These parameters are programmed in the corresponding registers when configuring the
unit.
The CPU (or DMA controller) can initialize the contents of each buffer using the Initialization
functions (Section 18.3.5: Initialization functions) and writing to the write data register. The
data is transferred to the location within the target buffer indicated by a write pointer. After
each new write, the write pointer is incremented. When the write pointer reaches the end of
the allocated buffer space, it wraps back to the base address. This feature is used to load
the elements of a vector prior to an operation, or to initialize a filter and load filter
coefficients.
Buffer configuration
The buffer sizes and base address offsets must be configured in the X1, X2 and Y buffer
configuration registers. For each function, the required buffer size is specified in the function
description in Section 18.3.6: Filter functions. The base addresses can be chosen anywhere
in internal memory, provided that all buffers fit within the internal memory address range
(0x00 to 0xFF), that is, base address + buffer size must be less than 256.
There is no constraint on the size and location of the buffers (they can overlap or even
coincide exactly). For filter functions it is recommended not to overlap buffers as this can
lead to erroneous behavior.
When circular buffer operation is required, an optional “headroom”, d, can be added to the
buffer size. Furthermore, a watermark level can be set, to regulate the CPU or DMA activity.
The value of d and the watermark level should be chosen according to the application
performance requirements. For maximum throughput, the input buffer should never go
empty, so d should be somewhat greater than the watermark level, allowing for any interrupt
or DMA latency. On the other hand, if the input data can not be provided as fast as the unit
can process them, the buffer can be allowed to empty waiting for the next data to be written,
so d can be equal to the watermark level (to ensure that no overflow occurs on the input).
18.3.3 Input buffers
The X1 and X2 buffers are used to store data for input to the MAC. Each multiplication takes
a value from the X1 buffer and a value from the X2 buffer and multiplies them together. A
pointer in the control unit generates the read address offset (relative to the buffer base
address) for each value. The pointers are managed by hardware according to the current
function.
To Next Page
Loading...
Need help?
General
