ST STM32G471 User Manual

RM0440 Rev 4 589/2126
RM0440 Quad-SPI interface (QUADSPI)
600
Bit 19 SMIE: Status match interrupt enable
This bit enables the status match interrupt.
0: Interrupt disable
1: Interrupt enabled
Bit 18 FTIE: FIFO threshold interrupt enable
This bit enables the FIFO threshold interrupt.
0: Interrupt disabled
1: Interrupt enabled
Bit 17 TCIE: Transfer complete interrupt enable
This bit enables the transfer complete interrupt.
0: Interrupt disabled
1: Interrupt enabled
Bit 16 TEIE: Transfer error interrupt enable
This bit enables the transfer error interrupt.
0: Interrupt disable
1: Interrupt enabled
Bits 15:12 Reserved, must be kept at reset value.
Bits 11:8 FTHRES[3:0]: FIFO threshold level
Defines, in indirect mode, the threshold number of bytes in the FIFO that will cause the
FIFO threshold flag (bit FTF in register QUADSPI_SR) to be set.
0: In indirect write mode (FMODE = 00) FTF is set if there are 1 or more free bytes
location left in the FIFO or indirect read mode (FMODE = 01) FTF is set if there are 1 or
more valid bytes that can be read from the FIFO
1: In indirect write mode (FMODE = 00) FTF is set if there are 2 or more free bytes
location left in the FIFO or indirect read mode (FMODE = 01) FTF is set if there are 2 or
more valid bytes that can be read from the FIFO
...
15: In indirect write mode (FMODE = 00) FTF is set if there are 16 free bytes location
left in the FIFO or indirect read mode (FMODE = 01) FTF is set if there are 16 valid
bytes that can be read from the FIFO
If DMAEN = 1, then the DMA controller for the corresponding channel must be disabled
before changing the FTHRES value.
Bit 7 FSEL: Flash memory selection
This bit selects the Flash memory to be addressed in single flash mode (when DFM =
0).
0: FLASH 1 selected
1: FLASH 2 selected
This bit can be modified only when BUSY = 0.
This bit is ignored when DFM = 1.
Bit 6 DFM: Dual-flash mode
This bit activates dual-flash mode, where two external Flash memories are used
simultaneously to double throughput and capacity.
0: Dual-flash mode disabled
1: Dual-flash mode enabled
This bit can be modified only when BUSY = 0.
Bit 5 Reserved, must be kept at reset value.

ST STM32G471 Specifications

General

Brand	ST
Model	STM32G471
Category	Microcontrollers
Language	English