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ST STM32G471 User Manual

ST STM32G471
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RM0440 Rev 4 861/2126
RM0440 High-resolution timer (HRTIM)
1083
Set / reset crossbar
A “set” event correspond to a transition to the output active state, while a “reset” event
corresponds to a transition to the output inactive state.
The polarity of the waveform is defined in the output stage to accommodate positive or
negative logic external components: an active level corresponds to a logic level 1 for a
positive polarity (POLx = 0), and to a logic level 0 for a negative polarity (POLx = 1).
Each of the timing units handles the set/reset crossbar for two outputs. These 2 outputs can
be set, reset or toggled by up to 32 events that can be selected among the following
sources:
The timing unit: period, compare 1..4, register update (6 events)
The master timer: period, compare 1..4, HRTIM synchronization (6 events)
All other timing units (e.g. timer B..F for timer A): TIMEVNT1..9 (9 events
described in Table 216)
The external events EXTEVNT1..10 (10 events)
A software forcing (1 event)
Note: In up/down mode (UDM bit set to 1), the counter period event is defined as per the
OUTROM[1:0] bit setting.
The event sources are ORed and multiple events can be simultaneously selected.
Each output is controlled by two 32-bit registers, one coding for the set (HRTIM_SETxyR)
and another one for the reset (HRTIM_RSTxyR), where x stands for the timing unit: A..F and
y stands for the output 1or 2 (e.g. HRTIM_SETA1R, HRTIM_RSTC2R,...).
If the same event is selected for both set and reset, it toggles the output. It is not possible to
toggle the output state more than one time per
t
HRTIM
period: in case of two consecutive
toggling events within the same cycle, only the first one is considered.
The set and reset requests are taken into account only once the counter is enabled (TxCEN
bit set), except if the software is forcing a request to allow the prepositioning of the outputs
at timer start-up.
Table 216 summarizes the events from other timing units that can be used to set and reset
the outputs. The number corresponds to the timer events (such as TIMEVNTx) listed in the
register, and empty locations are indicating non-available events.
For instance, timer A outputs can be set or reset by the following events: timer B compare 1
and 2, timer C compare 2 and 3,... and timer E compare 3 is listed as TIMEVNT7 in
HRTIM_SETA1R.

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ST STM32G471 Specifications

General IconGeneral
BrandST
ModelSTM32G471
CategoryMicrocontrollers
LanguageEnglish

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