High-resolution timer (HRTIM) RM0440
936/2126 RM0440 Rev 4
When a synchronization reset event occurs within the same f
HRTIM
clock cycle as the period
event, this reset is postponed to a programmed period event (since both events are causing
a counter roll-over). This applies only when the high-resolution is active (CKPSC[2:0] < 5).
Single-shot
retriggerable
01
The counter start is effective only if the counter is not started or period is
elapsed. Any synchronization event occurring after counter start has no
effect.
A start occurring when the counter is stopped at the period value resets the
counter. A reset request clears the counter but does not start it (the counter
can solely be started by the synchronization). A reset occurring during
counting is taken into account (as during regular retriggerable mode).
1X
The reset from HRTIM_SCIN is taken into account as any HRTIM’s timer
counter reset from internal events and is starting or re-starting the timer
counting.
When multiple reset requests are selected, the first arriving request is taken
into account.
Continuous mode
01
The timer is enabled (MCEN or TxCEN bit set) and is waiting for the
synchronization event to start the counter. Any synchronization event
occurring after the counter start has no effect (the counter can solely be
started by the synchronization). A reset request clears the counter but does
not start it.
1X
The reset from HRTIM_SCIN is taken into account as any HRTIM’s timer
counter reset from internal events and is starting or re-starting the timer
counting. When multiple reset requests are selected, the first arriving
request is taken into account.
Table 237. Effect of sync event versus timer operating modes (continued)
Operating mode
SYNC
RSTx
SYNC
STRTx
Behavior following a SYNC reset or start event
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