RM0440 Rev 4 989/2126
RM0440 High-resolution timer (HRTIM)
1083
27.5.23 HRTIM timer x compare 4 register (HRTIM_CMP4xR) (x = A to F)
Address offset: Block A: 0x0AC
Address offset: Block B: 0x12C
Address offset: Block C: 0x1AC
Address offset: Block D: 0x22C
Address offset: Block E: 0x2AC
Address offset: Block F: 0x32C
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
CMP4x[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 CMP4x[15:0]: Timer x compare 4 value
This register holds the compare 4 value.
This register holds either the content of the preload register or the content of the active register if
preload is disabled.
The compare value must be above or equal to 3 periods of the f
HRTIM
clock, that is 0x60 if
CKPSC[2:0] = 0, 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
This register can behave as an auto-delayed compare register, if enabled with DELCMP4[1:0] bits in
HRTIM_TIMxCR.
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