High-resolution timer (HRTIM) RM0440
1030/2126 RM0440 Rev 4
27.5.50 HRTIM timer x external event filtering register 3 (HRTIM_TIMxEEFR3)
(x = A to F)
Address offset: Block A: 0x0F0
Address offset: Block B: 0x170
Address offset: Block C: 0x1F0
Address offset: Block D: 0x270
Address offset: Block E: 0x2F0
Address offset: Block F: 0x370
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. EEVACNT[5:0] EEVASEL[3:0] Res.
EEVA
RSTM
EEVA
CRES
EEVA
CE
rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:14 Reserved, must be kept at reset value.
Bits 13:8 EEVACNT[5:0] External event A counter
This bitfield selects the external event A counter threshold. An event is considered valid when the
number of events is equal to the (EEVACNT[5:0]+1) value.
Bits 7:4 EEVASEL[3:0]: External event A Selection
This bit selects the external event A source.
0: External event 1 is used as external event A source
1: External event 2 is used as external event A source
...
9: External event 10 is used as external event A source
Others: Reserved
Bit 3 Reserved, must be kept at reset value.
Bit 2 EEVARSTM: External event A reset mode
This bit selects the external event x counter reset mode.
0: External event counter A is reset on each reset / roll-over event
1: External event counter A is reset on each reset / roll-over event only if no event occurs during last
counting period
Bit 1 EEVACRES: External event A counter reset
This bit resets the external event A counter. It is set by software and reset by hardware.
0: No action
1: External event counter A is reset
Bit 0 EEVACE: External event A counter enable
This bit enables the external event x counter.
0: External event A counter disabled
1: External event A counter enabled
To Next Page
Loading...
Need help?
General
