ST STM32G471 User Manual

High-resolution timer (HRTIM) RM0440
1050/2126 RM0440 Rev 4
27.5.66 HRTIM ADC trigger 1 register (HRTIM_ADC1R)
Address offset: 0x3BC
Reset value: 0x0000 0000
Bits 9:6 EE7F[3:0]: External event 7 filter
Refer to EE6F[3:0] description.
Bits 4:5 Reserved, must be kept at reset value.
Bits 3:0 EE6F[3:0]: External event 6 filter
This bitfield defines the frequency used to sample external event 6 input and the length of the digital
filter applied to EEV6. The digital filter is made of a counter in which N valid samples are
needed to validate a transition on the output.
0000: Filter disabled
0001: f
SAMPLING
= f
HRTIM
, N=2
0010: f
SAMPLING
= f
HRTIM
, N=4
0011: f
SAMPLING
= f
HRTIM
, N=8
0100: f
SAMPLING
= f
EEVS
/2, N=6
0101: f
SAMPLING
= f
EEVS
/2, N=8
0110: f
SAMPLING
= f
EEVS
/4, N=6
0111: f
SAMPLING
= f
EEVS
/4, N=8
1000: f
SAMPLING
= f
EEVS
/8, N=6
1001: f
SAMPLING
= f
EEVS
/8, N=8
1010: f
SAMPLING
= f
EEVS
/16, N=5
1011: f
SAMPLING
= f
EEVS
/16, N=6
1100: f
SAMPLING
= f
EEVS
/16, N=8
1101: f
SAMPLING
= f
EEVS
/32, N=5
1110: f
SAMPLING
= f
EEVS
/32, N=6
1111: f
SAMPLING
= f
EEVS
/32, N=8
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
ADC1
TEPER
ADC1
TEC4
ADC1
TEC3
ADC1
TFRST
ADC1
TDPER
ADC1
TDC4
ADC1
TDC3
ADC1
TFPER
ADC1
TCPER
ADC1
TCC4
ADC1
TCC3
ADC1
TFC4
ADC1
TBRST
ADC1
TBPER
ADC1
TBC4
ADC1
TBC3
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
ADC1
TFC3
ADC1
TARST
ADC1
TAPER
ADC1
TAC4
ADC1
TAC3
ADC1
TFC2
ADC1
EEV5
ADC1
EEV4
ADC1
EEV3
ADC1
EEV2
ADC1
EEV1
ADC1
MPER
ADC1
MC4
ADC1
MC3
ADC1
MC2
ADC1
MC1
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:0 Refer to HRTIM_ADC1R bits description.

ST STM32G471 Specifications

General

Brand	ST
Model	STM32G471
Category	Microcontrollers
Language	English