High-resolution timer (HRTIM) RM0440
1064/2126 RM0440 Rev 4
27.5.76 HRTIM ADC extended trigger register (HRTIM_ADCER)
Address offset: 0x3F8
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. ADC10TRG[4:0] ADC9TRG[4:0] ADC8TRG[4:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
Res. ADC7TRG[4:0] ADC6TRG[4:0] ADC5TRG[4:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bit 31 Reserved, must be kept at reset value.
Bits 30:26 ADC10TRG[4:0]: ADC trigger 10 selection
This bit selects the ADC trigger 10 source.
Refer to ADC6TRG[4:0] description.
Bits 25:21 ADC9TRG[4:0]: ADC trigger 9 selection
This bit selects the ADC trigger 9 source.
Refer to ADC5TRG[4:0] description.
Bits 20:16 ADC8TRG[4:0]: ADC trigger 8 selection
This bit selects the ADC trigger 8 source.
Refer to ADC6TRG[4:0] description.
Bit 15 Reserved, must be kept at reset value.