ST STM32G471 User Manual

General-purpose timers (TIM2/TIM3/TIM4/TIM5) RM0440
1338/2126 RM0440 Rev 4
29.5.28 TIMx alternate function register 2 (TIMx_AF2)(x = 2 to 5)
Address offset: 0x064
Reset value: 0x0000 0000
Bits 31:18 Reserved, must be kept at reset value.
Bits 17:14 ETRSEL[3:0]: etr_in source selection
These bits select the etr_in input source.
0000: tim_etr0: TIMx_ETR input
0001: tim_etr1
...
1111: tim_etr15
Refer to Section 29.4.2: TIM2/TIM3/TIM4/TIM5 pins and internal signals for product specific
implementation.
Bits 13:0 Reserved, must be kept at reset value.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. OCRSEL[2:0]
rw rw rw
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
Bits 31:19 Reserved, must be kept at reset value.
Bits 18:15 OCRSEL[2:0]: ocref_clr source selection
These bits select the ocref_clr input source.
000: tim_ocref_clr0
001: tim_ocref_clr1
...
111: tim_ocref_clr7
Refer to Section 29.4.2: TIM2/TIM3/TIM4/TIM5 pins and internal signals for product specific
implementation.
Bits 15:0 Reserved, must be kept at reset value.

ST STM32G471 Specifications

General

Brand	ST
Model	STM32G471
Category	Microcontrollers
Language	English