Universal synchronous/asynchronous receiver transmitter (USART/UART) RM0440
1658/2126 RM0440 Rev 4
Bits 21:20 WUS[1:0]: Wakeup from low-power mode interrupt flag selection
This bitfield specifies the event which activates the WUF (Wakeup from low-power mode
flag).
00: WUF active on address match (as defined by ADD[7:0] and ADDM7)
01: Reserved.
10: WUF active on start bit detection
11: WUF active on RXNE/RXFNE.
This bitfield can only be written when the USART is disabled (UE=0).
If the USART does not support the wakeup from Stop feature, this bit is reserved and
must be kept at reset value. Refer to Section 37.4: USART implementation on
page 1595.
Bits 19:17 SCARCNT[2:0]: Smartcard auto-retry count
This bitfield specifies the number of retries for transmission and reception in Smartcard
mode.
In transmission mode, it specifies the number of automatic retransmission retries, before
generating a transmission error (FE bit set).
In reception mode, it specifies the number or erroneous reception trials, before generating a
reception error (RXNE/RXFNE and PE bits set).
This bitfield must be programmed only when the USART is disabled (UE=0).
When the USART is enabled (UE=1), this bitfield may only be written to 0x0, in order to stop
retransmission.
0x0: retransmission disabled - No automatic retransmission in transmit mode.
0x1 to 0x7: number of automatic retransmission attempts (before signaling error)
Note: If Smartcard mode is not supported, this bit is reserved and must be kept at reset
value. Refer to Section 37.4: USART implementation on page 1595.
Bit 16 Reserved, must be kept at reset value.
Bit 15 DEP: Driver enable polarity selection
0: DE signal is active high.
1: DE signal is active low.
This bit can only be written when the USART is disabled (UE=0).
Note: If the Driver Enable feature is not supported, this bit is reserved and must be kept at
reset value. Refer to Section 37.4: USART implementation on page 1595.
Bit 14 DEM: Driver enable mode
This bit enables the user to activate the external transceiver control, through the DE signal.
0: DE function is disabled.
1: DE function is enabled. The DE signal is output on the RTS pin.
This bit can only be written when the USART is disabled (UE=0).
Note: If the Driver Enable feature is not supported, this bit is reserved and must be kept at
reset value. Section 37.4: USART implementation on page 1595.
Bit 13 DDRE: DMA Disable on Reception Error
0: DMA is not disabled in case of reception error. The corresponding error flag is set but
RXNE is kept 0 preventing from overrun. As a consequence, the DMA request is not
asserted, so the erroneous data is not transferred (no DMA request), but next correct
received data is transferred (used for Smartcard mode).
1: DMA is disabled following a reception error. The corresponding error flag is set, as well
as RXNE. The DMA request is masked until the error flag is cleared. This means that the
software must first disable the DMA request (DMAR = 0) or clear RXNE/RXFNE is case
FIFO mode is enabled) before clearing the error flag.
This bit can only be written when the USART is disabled (UE=0).
Note: The reception errors are: parity error, framing error or noise error.
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