ST STM32G471 User Manual

RM0440 Rev 4 2073/2126
RM0440 USB Type-C™ / USB Power Delivery interface (UCPD)
2079
46.7.7 UCPD Tx ordered set type register (UCPD_TX_ORDSETR)
Address offset: 0x01C
Reset value: 0x0000 0000
Writing to this register is only effective when the peripheral is enabled (UCPDEN = 1) and
no packet transmission is in progress (TXSEND and TXHRST bits are both low).
Bit 13 Reserved, must be kept at reset value.
Bit 12 RXMSGENDCF: Rx message received flag (RXMSGEND) clear
Setting the bit clears the RXMSGEND flag in the UCPD_SR register.
Bit 11 RXOVRCF: Rx overflow flag (RXOVR) clear
Setting the bit clears the RXOVR flag in the UCPD_SR register.
Bit 10 RXHRSTDETCF: Rx Hard Reset detect flag (RXHRSTDET) clear
Setting the bit clears the RXHRSTDET flag in the UCPD_SR register.
Bit 9 RXORDDETCF: Rx ordered set detect flag (RXORDDET) clear
Setting the bit clears the RXORDDET flag in the UCPD_SR register.
Bits 8:7 Reserved, must be kept at reset value.
Bit 6 TXUNDCF: Tx underflow flag (TXUND) clear
Setting the bit clears the TXUND flag in the UCPD_SR register.
Bit 5 HRSTSENTCF: Hard reset send flag (HRSTSENT) clear
Setting the bit clears the HRSTSENT flag in the UCPD_SR register.
Bit 4 HRSTDISCCF: Hard reset discard flag (HRSTDISC) clear
Setting the bit clears the HRSTDISC flag in the UCPD_SR register.
Bit 3 TXMSGABTCF: Tx message abort flag (TXMSGABT) clear
Setting the bit clears the TXMSGABT flag in the UCPD_SR register.
Bit 2 TXMSGSENTCF: Tx message send flag (TXMSGSENT) clear
Setting the bit clears the TXMSGSENT flag in the UCPD_SR register.
Bit 1 TXMSGDISCCF: Tx message discard flag (TXMSGDISC) clear
Setting the bit clears the TXMSGDISC flag in the UCPD_SR register.
Bit 0 Reserved, must be kept at reset value.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. TXORDSET[19:16]
rw rw rw rw
1514131211109876543210
TXORDSET[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:20 Reserved, must be kept at reset value.
Bits 19:0 TXORDSET[19:0]: Ordered set to transmit
The bitfield determines a full 20-bit sequence to transmit, consisting of four K-codes, each of
five bits, defining the packet to transmit. The bit 0 (bit 0 of K-code1) is the first, the bit 19 (bit
4 of K-code4) the last.

ST STM32G471 Specifications

General

Brand	ST
Model	STM32G471
Category	Microcontrollers
Language	English