ST STM32G471 User Manual

RM0440 Rev 4 1037/2126
RM0440 High-resolution timer (HRTIM)
1083
27.5.55 HRTIM interrupt enable register (HRTIM_IER)
Address offset: 0x390
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
BMPE
RIE
DLL
RDYIE
rw rw
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. Res.
FLT6
IE
SYSFL
TIE
FLT5IE FLT4IE FLT3IE FLT2IE FLT1IE
rw rw rw rw rw rw rw
Bits 31:18 Reserved, must be kept at reset value.
Bit 17 BMPERIE: Burst mode period interrupt enable
This bit is set and cleared by software to enable/disable the burst mode period interrupt.
0: Burst mode period interrupt disabled
1: Burst mode period interrupt enabled
Bit 16 DLLRDYIE: DLL Ready Interrupt Enable
This bit is set and cleared by software to enable/disable the DLL ready interrupt.
0: DLL ready interrupt disabled
1: DLL ready interrupt enabled
Bits 15:7 Reserved, must be kept at reset value.
Bit 6 FLT6IE: Fault 6 interrupt enable
Refer to FLT1IE description.
Bit 5 SYSFLTIE: System fault interrupt enable
Refer to FLT1IE description.
Bit 4 FLT5IE: Fault 5 interrupt enable
Refer to FLT1IE description.
Bit 3 FLT4IE: Fault 4 interrupt enable
Refer to FLT1IE description.
Bit 2 FLT3IE: Fault 3 interrupt enable
Refer to FLT1IE description.
Bit 1 FLT2IE: Fault 2 interrupt enable
Refer to FLT1IE description.
Bit 0 FLT1IE: Fault 1 interrupt enable
This bit is set and cleared by software to enable/disable the fault 1 interrupt.
0: Fault 1 interrupt disabled
1: Fault 1 interrupt enabled

ST STM32G471 Specifications

General

Brand	ST
Model	STM32G471
Category	Microcontrollers
Language	English