High-resolution timer (HRTIM) RM0440
1060/2126 RM0440 Rev 4
Bit 8 FLT6E: Fault 6 enable
Refer to FLT5E description.
Bit 7 FLT5LCK: Fault 5 lock
The FLT5LCK bit modifies the write attributes of the fault programming bit, so that they are protected
against spurious write accesses.
This bit is write-once. Once it has been set, it cannot be modified till the next system reset.
0: FLT5E, FLT5P, FLT5SRC[1:0], FLT5F[3:0] and FLT5BLK bits are read/write.
1: FLT5E, FLT5P, FLT5SRC[1:0], FLT5F[3:0] and FLT5BLK bits cannot be written (read-only mode)
Bits 6:3 FLT5F[3:0]: Fault 5 filter
This bitfield defines the frequency used to sample FLT5 input and the length of the digital filter
applied to FLT5. The digital filter is made of an event counter in which N events are needed to
validate a transition on the output.
0000: No filter, FLT5 acts asynchronously
0001: f
SAMPLING
= f
HRTIM
, N = 2
0010: f
SAMPLING
= f
HRTIM
, N = 4
0011: f
SAMPLING
= f
HRTIM
, N = 8
0100: f
SAMPLING
= f
FLTS
/2, N = 6
0101: f
SAMPLING
= f
FLTS
/2, N = 8
0110: f
SAMPLING
= f
FLTS
/4, N = 6
0111: f
SAMPLING
= f
FLTS
/4, N = 8
1000: f
SAMPLING
= f
FLTS
/8, N = 6
1001: f
SAMPLING
= f
FLTS
/8, N = 8
1010: f
SAMPLING
= f
FLTS
/16, N = 5
1011: f
SAMPLING
= f
FLTS
/16, N = 6
1100: f
SAMPLING
= f
FLTS
/16, N = 8
1101: f
SAMPLING
= f
FLTS
/32, N = 5
1110: f
SAMPLING
= f
FLTS
/32, N = 6
1111: f
SAMPLING
= f
FLTS
/32, N = 8
Note: This bitfield is written only when FLT5E enable bit is reset.
This bitfield is modified when FLT5LOCK has been programmed.
Bit 2 FLT5SRC[0]: Fault 5 source bit 0
The FTL5SRC[1:0] bitfield selects the FAULT5 input source (refer to Table 233 for connection
details).
00: Fault 5 input is HRTIM_FLT5 input pin
01: Fault 5 input is connected to a COMPx output
10: Fault 5 input is EEV5_muxout input pin
01: Reserved
Note: This bitfield is written only when FLT5E enable bit is reset.
Bit 1 FLT5P: Fault 5 polarity
This bit selects the FAULT5 input polarity.
0: Fault 5 input is active low
1: Fault 5 input is active high
Note: This bitfield is written only when FLT5E enable bit is reset.
Bit 0 FLT5E: Fault 5 enable
This bit enables the global FAULT5 input circuitry.
0: Fault 5 input disabled
1: Fault 5 input enabled