ST STM32G471 User Manual

Advanced-control timers (TIM1/TIM8/TIM20) RM0440
1184/2126 RM0440 Rev 4
28.6.4 TIMx DMA/interrupt enable register (TIMx_DIER)(x = 1, 8, 20)
Address offset: 0x00C
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res.
TERR
IE
IERRIE DIRIE IDXIE Res. Res. Res. Res.
rw rw rw rw
1514131211109876543210
Res. TDE COMDE CC4DE CC3DE CC2DE CC1DE UDE BIE TIE COMIE CC4IE CC3IE CC2IE CC1IE UIE
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:24 Reserved, must be kept at reset value.
Bit 23 TERRIE: Transition error interrupt enable
0: Transition error interrupt disabled
1: Transition error interrupt enabled
Bit 22 IERRIE: Index error interrupt enable
0: Index error interrupt disabled
1: Index error interrupt enabled
Bit 21 DIRIE: Direction change interrupt enable
0: Direction Change interrupt disabled
1: Direction Change interrupt enabled
Bit 20 IDXIE: Index interrupt enable
0: Index interrupt disabled
1: Index Change interrupt enabled
Bits 19:15 Reserved, must be kept at reset value.
Bit 14 TDE: Trigger DMA request enable
0: Trigger DMA request disabled
1: Trigger DMA request enabled
Bit 13 COMDE: COM DMA request enable
0: COM DMA request disabled
1: COM DMA request enabled
Bit 12 CC4DE: Capture/compare 4 DMA request enable
0: CC4 DMA request disabled
1: CC4 DMA request enabled
Bit 11 CC3DE: Capture/compare 3 DMA request enable
0: CC3 DMA request disabled
1: CC3 DMA request enabled
Bit 10 CC2DE: Capture/compare 2 DMA request enable
0: CC2 DMA request disabled
1: CC2 DMA request enabled
Bit 9 CC1DE: Capture/compare 1 DMA request enable
0: CC1 DMA request disabled
1: CC1 DMA request enabled

ST STM32G471 Specifications

General

Brand	ST
Model	STM32G471
Category	Microcontrollers
Language	English