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ST STM32G471 User Manual

ST STM32G471
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High-resolution timer (HRTIM) RM0440
960/2126 RM0440 Rev 4
Bit 21 TECEN: Timer E counter enable
This bit starts the timer E counter.
0: Timer E counter disabled
1: Timer E counter enabled
Note: This bit must not be changed within a minimum of 8 cycles of f
HRTIM
clock.
Bit 20 TDCEN: Timer D counter enable
This bit starts the timer D counter.
0: Timer D counter disabled
1: Timer D counter enabled
Note: This bit must not be changed within a minimum of 8 cycles of f
HRTIM
clock.
Bit 19 TCCEN: Timer C counter enable
This bit starts the timer C counter.
0: Timer C counter disabled
1: Timer C counter enabled
Note: This bit must not be changed within a minimum of 8 cycles of f
HRTIM
clock.
Bit 18 TBCEN: Timer B counter enable
This bit starts the timer B counter.
0: Timer B counter disabled
1: Timer B counter enabled
Note: This bit must not be changed within a minimum of 8 cycles of f
HRTIM
clock.
Bit 17 TACEN: Timer A counter enable
This bit starts the timer A counter.
0: Timer A counter disabled
1: Timer A counter enabled
Note: This bit must not be changed within a minimum of 8 cycles of f
HRTIM
clock.
Bit 16 MCEN: Master timer counter enable
This bit starts the master timer counter.
0: Master counter disabled
1: Master counter enabled
Note: This bit must not be changed within a minimum of 8 cycles of f
HRTIM
clock.
Bits 15:14 SYNCSRC[1:0]: Synchronization source
These bits define the source and event to be sent on the synchronization outputs SYNCOUT[2:1]
00: Master timer start
01: Master timer compare 1 event
10: Timer A start/reset
11: Timer A compare 1 event
Bits 13:12 SYNCOUT[1:0]: Synchronization output
These bits define the routing and conditioning of the synchronization output event.
00: Disabled
01: Reserved.
10: Positive pulse on HRTIM_SCOUT output (16x f
HRTIM
clock cycles)
11: Negative pulse on HRTIM_SCOUT output (16x f
HRTIM
clock cycles)
Note: This bitfield must not be modified once the counter is enabled (TxCEN bit set)
Bit 11 SYNCSTRTM: Synchronization starts master
This bit enables the master timer start when receiving a synchronization input event:
0: No effect on the master timer
1: A synchronization input event starts the master timer

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ST STM32G471 Specifications

General IconGeneral
BrandST
ModelSTM32G471
CategoryMicrocontrollers
LanguageEnglish

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