To Next Page

To Previous Page

5-112 Bus Interface

AMD-K5 Processor Technical Reference Manual 18524C/0—Nov1996

Unlike INIT, RESET reinitializes the processor’s entire state.

In particular, RESET differs by reinitializing the contents of

the caches, floating-point registers, control registers, and

model-specific registers, as well as all other states that are

reinitialized by INIT.

A20M should not be asserted during RESET. The operating

system alone is responsible for controlling the state of A20M

by writing to an external register provided for this purpose.

(See the description of A20M on page 5-18.)

Because the processor boots in Real mode, the memory address

decoder must alias the physical address FFFF_FFF0h to the

physical address 000F_FFF0h, which lies within the 1-Mbyte

Table 5-16. Outputs at RESET

Output RESET State

ADS

A31–A3 Floating

APCHK

BE7

–BE0 FFh

BREQ 1

BRDY

BRDYC

CACHE

D/C

D63–D0 Floating

DP7–DP0 00h

FERR

HIT

HITM

HLDA 0

LOCK

M/IO

PCD 0

PCHK

PRDY 0

PWT 0

W/R

Questions and Answers:

Need help?

Do you have a question about the AMD K5 and is the answer not in the manual?

AMD K5 Specifications

General