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AMD K5 User Manual

AMD K5
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New Instructions 3-29
18524C/0Nov1996 AMD-K5 Processor Technical Reference Manual
3.3.1 CPUID
mnemonic opcode description
CPUID 0FA2h Identify processor
Privilege: CPL=0
Registers Affected: EAX, EBX, ECX, EDX
Flags Affected: none
Exceptions Generated: Real, Virtual-8086 modenone
Protected modenone
The CPUID instruction identifies the type of processor and the features it supports.
A 0 or 1 value written to the EAX register specifies what information will be
returned by the instruction.
The processor implements the ID flag (bit 21) in the EFLAGS register. By writing and
reading this bit, software can verify that the processor will execute the CPUID
instruction.
For detailed instructions on processor and feature identification see the AMD Proces-
sor Recognition application note, order# 20734.
Table 3-8 outlines the AMD-K5 processor family codes and model codes with the
CPU clock frequencies (MHz), bus frequencies (MHz), and P-rating strings (“Pxxx”).
Table 3-8. CPU Clock Frequencies, Bus Frequencies, and P-Rating Strings
Family Code Model Code CPU Frequency (MHz) CPU Bus Frequency (MHz)
P-Rating String (“Pxxx”)
1
5
0
75 50 P75
90 60 P90
100 66 P100
1
90 60 P120
100 66 P133
120 60 P150
133 66 P166
Notes:
1. The CPUID instruction does not return a P-Rating string.
This table does not constitute product announcements. Instead, the information in the table represents possible product offerings.
AMD will announce actual products based on availability and market demand..

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AMD K5 Specifications

General IconGeneral
ManufacturerAMD
ModelK5
Architecturex86
MicroarchitectureK5
Introduction Year1996
Clock Speed75 - 133 MHz
Core Count1
SocketSocket 7
Core steppingSSA/5, 5k86
Voltage3.3V
Transistors4.3 million
L1 Cache8 KB (data) + 16 KB (instruction)
FSB50 MHz to 66 MHz
Process Technology350 nm

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