3-6 Software Environment and Extensions
AMD-K5 Processor Technical Reference Manual 18524C/0—Nov1996
Figure 3-3. 4-Mbyte Paging Mechanism
To enable the 4-Mbyte paging option:
1. Set the Page Size Extension (PSE) bit in CR4 to 1.
2. Set the Page Size (PS) bit in the page-directory entry to 1.
3. Write the physical base addresses of 4-Mbyte pages in bits
31–22 of page-directory entries. (Bits 21–12 of these entries
must be cleared to 0 or the processor will generate a page
fault.)
4. Load CR3 with the base address of the page directory that
contains these page-directory entries.
Linear Address
4-Mbyte
Page
Directory
4-Mbyte
Page
CR3
02131 22
Page Directory
Offset
Page
Offset
PDE
Byte
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