AMD K5 User Manual

3-20 Software Environment and Extensions
AMD-K5 Processor Technical Reference Manual 18524C/0—Nov1996
Table 3-5E. Instructions that Modify the IF or VIF Flags—Protected Mode Virtual
Interrupt Extensions (PVI)
1
TYPE PE VM VME PVI IOPL GP(0) IF VIF
CLI 1 0 —1 3NoIF ← 0No Change
CLI 1 0 — 1 < 3 No No Change VIF ← 0
STI 1 0 — 1 3 No IF ← 1No Change
STI 1 0 — 1 < 3
No
3
No Change VIF ← 1
PUSHF 1 0 — 1 3 No Pushed Not Pushed
PUSHF 1 0 — 1 < 3 No Pushed Not Pushed
PUSHFD 1 0 — 1 3 No Pushed Pushed
PUSHFD 1 0 — 1 < 3 No Pushed Pushed
POPF 1 0 — 1 3 No Popped Not Popped
POPF 1 0 — 1 < 3 No Not Popped Not Popped
POPFD 1 0 — 1 3 No Popped Not Popped
POPFD 1 0 — 1 < 3 No Not Popped Not Popped
IRETD
2
10—1—
No
3
Popped Popped
Notes:
1. All Protected mode virtual interrupt tasks run at CPL = 3.
2. All protected mode virtual interrupt handlers run at CPL = 0.
3. GP(0) if an attempt is made to set VIF when VIP = 1.
— Not applicable.

AMD K5 Specifications

General

Manufacturer	AMD
Model	K5
Architecture	x86
Microarchitecture	K5
Introduction Year	1996
Clock Speed	75 - 133 MHz
Core Count	1
Socket	Socket 7
Core stepping	SSA/5, 5k86
Voltage	3.3V
Transistors	4.3 million
L1 Cache	8 KB (data) + 16 KB (instruction)
FSB	50 MHz to 66 MHz
Process Technology	350 nm