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AMD K5 User Manual

AMD K5
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Hardware Debug Tool (HDT) 7-23
18524C/0Nov1996 AMD-K5 Processor Technical Reference Manual
7.9 Hardware Debug Tool (HDT)
The Hardware Debug Tool (HDT)sometimes referred to as
the debug port or Probe modeis a collection of signals, regis-
ters, and processor microcode that is enabled when external
debug logic drives R/S Low or loads the processor’s Test Access
Port (TAP) instruction register with the USEHDT instruction.
Documentation on the HDT is available under nondisclosure
agreement to test and debug developers. For information, con-
tact your AMD sales representative or field application engi-
neer.

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AMD K5 Specifications

General IconGeneral
ManufacturerAMD
ModelK5
Architecturex86
MicroarchitectureK5
Introduction Year1996
Clock Speed75 - 133 MHz
Core Count1
SocketSocket 7
Core steppingSSA/5, 5k86
Voltage3.3V
Transistors4.3 million
L1 Cache8 KB (data) + 16 KB (instruction)
FSB50 MHz to 66 MHz
Process Technology350 nm

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