AMD K5

7-8 Test and Debug
AMD-K5 Processor Technical Reference Manual 18524C/0—Nov1996
■ 4-Kbyte TLB—128-entry, 4-way, set associative
• Linear-tag array
• Page array
■ 4-Mbyte TLB—4-entry, fully associative
• Linear-tag array
• Page array
7.4.1 Array Access Register (AAR)
The 64-bit Array Access Register (AAR) is a model-specific
register (MSR) that contains a 32-bit array pointer, which iden-
tifies the array location to be tested, and 32 bits of array test
data to be read or written. The WRMSR and RDMSR instruc-
tions access the AAR when the ECX register contains the value
82h, as described in Section 3.3.5 on page 3-33. Figure 7-2
shows the format of the AAR.
Figure 7-2. Array Access Register (AAR)
To read or write an array location, perform the following steps:
1. ECX—Enter 82h into ECX to access the 64-bit AAR.
2. EDX—Enter a 32-bit array pointer into EDX, as shown in
Figures 7-3 through 7-8 (top).
3. EAX—Read or write 32 bits of array test data to or from
EAX, as shown in Figures 7-3 through 7-8 (bottom).
MSR
82h
031
031
Array Pointer
(Contents of EDX)
Array Data
(Contents of EAX)