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AMD K5 User Manual

AMD K5
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Control Register 4 (CR4) Extensions 3-17
18524C/0Nov1996 AMD-K5 Processor Technical Reference Manual
Table 3-5B. Instructions that Modify the IF or VIF FlagsProtected Mode
TYPE PE VM VME PVI IOPL
Handler
CPL
GP(0) IF VIF
CLI 1 0 —0CPL No IF 0—
CLI 1 0 0 < CPL Yes
STI 1 0 0 CPL No IF 1—
STI 1 0 0 < CPL Yes
PUSHF 1 0 0 CPL No Pushed
PUSHF 1 0 0 < CPL No Pushed
PUSHFD 1 0 0 CPL No Pushed Pushed
PUSHFD 1 0 0 < CPL No Pushed Pushed
POPF 1 0 0 CPL No Popped
POPF 1 0 0 < CPL No Not Popped
POPFD 1 0 0 CPL No Popped Not Popped
POPFD 1 0 0 < CPL No Not Popped Not Popped
IRET 1 0 0 = 0 No Popped
IRET 1 0 0 CPL > 0
No
1
Popped
IRET 1 0 0 < CPL > 0
No
1
Not Popped
IRETD 1 0 0 = 0 No Popped Popped
IRETD 1 0 0 CPL > 0
No
1
Popped Not Popped
IRETD 1 0 0 < CPL > 0
No
1
Not Popped Not Popped
Notes:
1. GP(0) if the CPL of the task executing IRETD is greater than the CPL of the task returned to.
Not applicable.

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AMD K5 Specifications

General IconGeneral
ManufacturerAMD
ModelK5
Architecturex86
MicroarchitectureK5
Introduction Year1996
Clock Speed75 - 133 MHz
Core Count1
SocketSocket 7
Core steppingSSA/5, 5k86
Voltage3.3V
Transistors4.3 million
L1 Cache8 KB (data) + 16 KB (instruction)
FSB50 MHz to 66 MHz
Process Technology350 nm

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