AMD K5 - 4.2 Dispatch and Execution Timing

Dispatch and Execution Timing 4-5
18524C/0—Nov1996 AMD-K5 Processor Technical Reference Manual
4.2 Dispatch and Execution Timing
This section documents functional unit usage for each instruc-
tion, along with relative cycle numbers for dispatch and execu-
tion of the associated ROPs for the instruction.
4.2.1 Notation
Table 4-1 on page 4-8 contains the definitions for the integer
instructions. Table 4-3 on page 4-19 contains the definitions for
the floating-point instructions. The first column in these tables
indicates the instruction mnemonic and operand types. The fol-
lowing notations are used in the AMD-K5 microprocessor docu-
mentation:
■ reg—register
■ mem—memory location
■ imm—immediate value
■ int_16—16-bit integer
■ int_32—32-bit integer
■ int_64—64-bit integer
■ real_32—32-bit floating-point number
■ real_64—64-bit floating-point number
■ real_80—80-bit floating-point number
If an operand refers to a specific register, the register name is
used (e.g., AX, DX). When the register name is of the form Exx
(e.g., EAX, ESI), the width of the register depends on the oper-
and size attribute.