AMD K5 User Manual

Signal Descriptions 5-129
18524C/0—Nov1996 AMD-K5 Processor Technical Reference Manual
5.2.52 TDO (Test Data Output)
Output
Summary TDO carries output data for testing on the Test Access Port
(TAP).
Driven and Floated The processor drives TDO every falling TCK edge, but only
during the shift_IR and shift_DR states. It is floated at all other
times.
TDO is always driven, except when floated and while RESET
or INIT is asserted.
Details Instructions are shifted out of the processor on TDO during the
shift_IR TAP state. Data are shifted out of the processor on
TDO during the shift_DR TAP state.
See the IEEE Standard Test Access Port and Boundary-Scan
Architecture (IEEE 1149.1) specification for a description of
how the TAP signals and instructions are used for testing.

AMD K5 Specifications

General

Manufacturer	AMD
Model	K5
Architecture	x86
Microarchitecture	K5
Introduction Year	1996
Clock Speed	75 - 133 MHz
Core Count	1
Socket	Socket 7
Core stepping	SSA/5, 5k86
Voltage	3.3V
Transistors	4.3 million
L1 Cache	8 KB (data) + 16 KB (instruction)
FSB	50 MHz to 66 MHz
Process Technology	350 nm