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AMD K5 User Manual

AMD K5
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New Instructions 3-31
18524C/0Nov1996 AMD-K5 Processor Technical Reference Manual
3.3.3 MOV to and from CR4
mnemonic opcode description
MOV CR4,r32 0F22 Move to CR4 from register
MOV r32,CR4 0F20 Move to register from CR4
Privilege: CPL = 0
Registers Affected: CR4, 32-bit general-purpose register
Flags Affected: none
Exceptions Generated: Real modenone
Virtual-8086 modeGP(0)
Protected modeGP(0) if CPL not = 0
These instructions read and write control register 4 (CR4).

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AMD K5 Specifications

General IconGeneral
ManufacturerAMD
ModelK5
Architecturex86
MicroarchitectureK5
Introduction Year1996
Clock Speed75 - 133 MHz
Core Count1
SocketSocket 7
Core steppingSSA/5, 5k86
Voltage3.3V
Transistors4.3 million
L1 Cache8 KB (data) + 16 KB (instruction)
FSB50 MHz to 66 MHz
Process Technology350 nm

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