Signal Descriptions 5-111
18524C/0—Nov1996 AMD-K5 Processor Technical Reference Manual
EDX 0000_050x
ESI 0000_0000
EDI 0000_0000
EBP 0000_0000
ESP 0000_0000
FPU Stack R7–R0 0000_0000_0000_0000_0000
FPU Exception Pointer 0_0000_0000_0000
CS F000
SS 0000
DS 0000
ES 0000
FS 0000
GS 0000
GDTR base:0000_0000 limit:0000
IDTR base:0000_0000 limit:0000
TR 0000
LDTR 0000
CR0 6000_0010
CR2 0000_0000
CR3 0000_0000
CR4 0000_0000
DR7 0000_0400
DR6 FFFF_0FF0
DR3 0000_0000
DR2 0000_0000
DR1 0000_0000
DR0 0000_0000
Table 5-15. Register State After RESET or INIT (continued)
Register
Contents (hex)
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