EasyManuals Logo

AMD K5 User Manual

AMD K5
406 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #97 background imageLoading...
Page #97 background image
Dispatch and Execution Timing 4-7
18524C/0Nov1996 AMD-K5 Processor Technical Reference Manual
The x/y value following the ROP type indicates the relative dis-
patch and execution cycle of the opcode, in the absence of any
conflicts. The format is:
x/y[/z]
where:
x=Dispatch CycleThe relative cycle in which the ROP is
dispatched from decode to the reservation station.
y=Execution CycleThe relative cycle in which the ROP is
issued from the reservation station to the execution unit.
z=Result CycleThe relative cycle in which the result is
returned on the result bus. It is indicated only when the
latency is greater than one cycle. For stores, it reflects the
relative time that a store operand is available to be for-
warded from the store buffer to a dependent load opera-
tion.
Using the time that the first ROP of an instruction is dis-
patched to an execution unit as clock 1, the x/y value indicates
in which clock each ROP is dispatched and executed relative to
clock 1. The execution order and timing does not necessarily
match the dispatch order and timing.
If any of the instructions read from or write to memory, it is
assumed that the data exists in the cache.

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the AMD K5 and is the answer not in the manual?

AMD K5 Specifications

General IconGeneral
ManufacturerAMD
ModelK5
Architecturex86
MicroarchitectureK5
Introduction Year1996
Clock Speed75 - 133 MHz
Core Count1
SocketSocket 7
Core steppingSSA/5, 5k86
Voltage3.3V
Transistors4.3 million
L1 Cache8 KB (data) + 16 KB (instruction)
FSB50 MHz to 66 MHz
Process Technology350 nm

Related product manuals