Embedded flash memory (FLASH) RM0453
114/1450 RM0453 Rev 5
4.4.2 Option bytes programming
After a reset, the options related bits in FLASH_CR and FLASH_C2CR are write-protected.
To run any operation on the option bytes page, the option lock bit OPTLOCK in FLASH_CR
must be cleared.
The following sequence is used to unlock the FLASH_CR and flash memory option
registers:
1. Unlock FLASH_CR with the LOCK clearing sequence (refer to Unlocking the flash
memory).
2. Write OPTKEY1 = 0x0819 2A3B in FLASH_OPTKEYR
3. Write OPTKEY2 = 0x4C5D 6E7F in FLASH_OPTKEYR
Any wrong sequence locks up the flash option register until the next system reset. In the
case of a wrong key sequence, a bus error is detected and a hard fault interrupt is
generated.
The user options can be protected against unwanted erase/program operations by setting
the OPTLOCK bit by software.
Note: If LOCK is set by software, OPTLOCK is automatically set as well.
Note: In a multi-CPU system, it is good practice to use semaphores to manage option
programming and prevent simultaneous option programming by the CPUs.
Modify user options
The option bytes are programmed differently from a main memory user address.
To modify the user options value, follow the procedure below:
1. Clear OPTLOCK option lock bit with the clearing sequence described above
2. Write the desired options value in the options registers.
3. Check that no flash memory operation is ongoing by checking the BSY bit in
FLASH_SR or FLASH_C2SR.
4. Check that flash program and erase operation is allowed by checking the PESD bit in
FLASH_SR or FLASH_C2SR (these checks are recommended even if status may
change due to flash operation requests by the other CPU, to limit the risk of receiving a
bus error when modifying user options).
0x1FFF 7870
SUBGHZSPISD
Res.
Res.
Res.
Res.
Res.
Res.
Res.
HDPAD
HDPSA[6:0]
Res.
Res.
Res.
DDS
Res.
Res.
Res.
Res.
FSD
SFSA[6:0]
0x1FFF 7878
C2OPT
NBRSD
SNBRSA[4:0]
Res.
BRSD
SBRSA[4:0]
Res.
Res.
SBRV[15:0]
0x1FFF 7FF8
OPTVAL[31:0]
1. The upper 32 bits of the double-word address contain the inverted data from the lower 32 bits.
Table 16. Option bytes organization (continued)
Address
(1)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
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