Peripherals interconnect matrix RM0453
446/1450 RM0453 Rev 5
12 Peripherals interconnect matrix
12.1 Introduction
Several peripherals have direct connections between them, enabling autonomous
communication and/or synchronization between them. This saves CPU resources and,
consequently power consumption. In addition, these hardware connections remove
software latency and result in more predictable system design.
Depending on peripherals, these interconnections can operate in Run, Sleep, LPRun,
LPSleep, Stop 0, Stop 1 and Stop 2 modes.
12.2 Connection summary
Table 76. STM32WL5x peripherals interconnect matrix
(1)
(2)
Source
Destination
TIM1
TIM2
TIM16
TIM17
LPTIM1
LPTIM2
LPTIM3
ADC
DAC
COMP1
COMP2
DMAMUX1
IRTIM
SUBGHZSPI
TIM1 - 1 - - - - - 3388 - - -
TIM2 1
- - - - - - 3388- - -
TIM16
- - - - - - - - - - - - 12 -
TIM17 1
- - - - - - - - - - - 12 -
LPTIM1
- - - - - - 2 - 4 - - 13 - -
LPTIM2
- - - - - - 2 - 4 - - 13 - -
LPTIM3
- - - - - - - - - - - 13 - 14
ADC 5
- - - - - - - - - - - -
Temperature
sensor
- - - - - - - 9 - - - - - -
VBAT
- - - - - - - 9 - - - - - -
VREFINT
- - - - - - - 9 - - - - - -
HSE32
- - - 6 - - - - - - - - - -
LSE
- 66 - - - - - - - - - - -
MSI
- - - 6 - - - - - - - - - -
LSI
- - 6 - - - - - - - - - - -
MCO
- - - 6 - - - - - - - - - -
GPIO EXTI
- - - - - - - 33- - 13 - -
RTC
- - 6 - 77- - - - - - - -
TAMP
- - - - 77- - - - - - - -