STMicroelectronics STM32WL5 Series User Manual

True random number generator (RNG) RM0453
642/1450 RM0453 Rev 5
22.6.2 Validation conditions
STMicroelectronics has tested the RNG true random number generator in the following
conditions:
• RNG clock rng_clk= 48 MHz
• RNG configurations described in Table 131: RNG configurations. Note that only
configuration A can be certified NIST SP800-90B.
22.6.3 Data collection
In order to run statistical tests, it is required to collect samples from the entropy source at the
raw data level as well as at the output of the entropy source. For details on data collection
and the running of statistical test suites refer to “STM32 microcontrollers random number
generation validation using NIST statistical test suite” application note (AN4230) available
from www.st.com.
Contact STMicroelectronics if the above samples need to be retrieved for the product.
22.7 RNG registers
The RNG is associated with a control register, a data register and a status register.
22.7.1 RNG control register (RNG_CR)
Address offset: 0x000
Reset value: 0x0080 0000
Table 131. RNG configurations
RNG
Config.
RNG_CR bits
Loop
number
(N)
RNG_
HTCR
register
(1)
1. When writing this register, the magic number 0x17590ABC must be written immediately before the
indicated value.
NISTC
bit
RNG_
CONFIG1
[5:0]
CLKDIV
[3:0]
RNG_
CONFIG2
[2:0]
RNG_
CONFIG3
[3:0]
CED
bit
A 0 0x0F 0x0 0x0 0xD 0 2
0x0000
AA74
(2)
2. Corresponds to 42 for repetition tests and 628 for adaptive tests. See Health checks on page 636 for
details.
B 1 0x18 0x0 0x0 0x0 0 1
0x0000
AA74
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
CONFI
GLOCK
COND
RST
Res. Res. Res. Res. RNG_CONFIG1[5:0] CLKDIV[3:0]
rs rw rw rw rw rw rw rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RNG_CONFIG2[2:0] NISTC RNG_CONFIG3[3:0] Res. Res. CED Res. IE RNGEN Res. Res.
rw rw rw rw rw rw rw rw rw rw rw

STMicroelectronics STM32WL5 Series Specifications

General

Brand	STMicroelectronics
Model	STM32WL5 Series
Category	Microcontrollers
Language	English