STMicroelectronics STM32WL5 Series

RM0453 Rev 5 211/1450
RM0453 Sub-GHz radio (SUBGHZ)
227
5.10.12 Sub-GHz radio generic whitening LSB register
(SUBGHZ_GWHITEINIRL)
Address offset: 0x6B9
Reset value: 0x00
5.10.13 Sub-GHz radio generic payload length register
(SUBGHZ_GRTXPLDLEN)
Address offset: 0x6BB
Reset value: 0x0F
5.10.14 Sub-GHz radio generic CRC initial MSB register
(SUBGHZ_GCRCINIRH)
Address offset: 0x6BC
Reset value: 0x1D
Bit 4 CONTTX: Generic packet continuous transmit enable
Bits 3:2 INFSEQSEL[1:0]: Generic packet infinite sequence selection
00: preamble 0x5555
01: all zero 0x0000
10: all one 0xFFFF
11: PRBS9
Bit 1 INFSQEQEN: Generic packet infinite sequence enable
Bit 0 WHITEINI[8]: Generic packet whitening initial value MSB bit [8]
76543210
WHITEINI[7:0]
rw rw rw rw rw rw rw rw
Bits 7:0 WHITEINI[7:0]: Generic packet whitening initial value LSB bits [7:0]
76543210
RTXPLDLEN[7:0]
rw rw rw rw rw rw rw rw
Bits 7:0 RTXPLDLEN[7:0]: Payload length FIFO match value in Rx and Tx
76543210
CRCINI[15:8]
rw rw rw rw rw rw rw rw
Bits 7:0 CRCINI[15:8]: Generic packet CRC initial polynomial MSB bits [15:8]
These bits are used for CRC initialization.