STMicroelectronics STM32WL5 Series User Manual

RM0453 Rev 5 87/1450
RM0453 Global security controller (GTZC)
97
3.5.3 GTZC TZSC privileged configuration register
(GTZC_TZSC_PRIVCFGR1)
Address offset: 0x020
Reset value: 0x0000 0000
Privileged write access only.
A bit of this register can be written only by a secure privileged transaction, when the
corresponding bit in GTZC_TZSC_SECCFGR1 register or the flash user option is set to
secure. If non-secure, the register bit can be written by secure privileged and non-secure
privileged transactions.
Read access is authorized for any type of transaction, secure/non-secure,
privileged/unprivileged.
An illegal access event on a secure access is only generated when all peripheral register
bits in GTZC_TZSC_SECCFGR1 are configured as secure.
When TZSC configuration is locked in GTZC_TZSC_CR.LCK, this register cannot be
modified.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res.
PKAPRIV
Res. Res. Res. Res. Res. Res. Res. Res.
SUBGHZSPIPRIV
RNGPRIV
AESPRIV
Res. Res.
rw rw rw rw
Bits 31:14 Reserved, must be kept at reset value.
Bit 13 PKAPRIV: Privileged access mode enabled for PKA
0: Unprivileged
1: Privileged
Bits 12:5 Reserved, must be kept at reset value.
Bit 4 SUBGHZSPIPRIV: Privileged access mode enabled for sub-GHz SPI
0: Unprivileged
1: Privileged
Bit 3 RNGPRIV: Privileged access mode enabled for RNG
0: Unprivileged
1: Privileged
Bit 2 AESPRIV: Privileged access mode enabled for AES
0: Unprivileged
1: Privileged
Bits 1:0 Reserved, must be kept at reset value.

STMicroelectronics STM32WL5 Series Specifications

General

Brand	STMicroelectronics
Model	STM32WL5 Series
Category	Microcontrollers
Language	English