STMicroelectronics STM32WL5 Series User Manual

Inter-integrated circuit (I2C) interface RM0453
1086/1450 RM0453 Rev 5
Bus idle detection
In order to enable the t
IDLE
check, the 12-bit TIMEOUTA[11:0] field must be programmed
with the timer reload value in order to obtain the t
IDLE
parameter. The TIDLE bit must be
configured to ‘1 in order to detect both SCL and SDA high level timeout.
Then the timer is enabled by setting the TIMOUTEN bit in the I2C_TIMEOUTR register.
If both the SCL and SDA lines remain high for a time greater than
(TIMEOUTA + 1) x 4 x t
I2CCLK
, the TIMEOUT flag is set in the I2C_ISR register.
Refer to Table 235.
Caution: Changing TIMEOUTA and TIDLE configuration is not allowed when TIMEOUTEN is set.
34.4.13 SMBus: I2C_TIMEOUTR register configuration examples
This section is relevant only when SMBus feature is supported. Refer to Section 34.3.
• Configuring the maximum duration of t
TIMEOUT
to 25 ms:
• Configuring the maximum duration of t
LOW:SEXT
and t
LOW:MEXT
to 8 ms:
• Configuring the maximum duration of t
IDLE
to 50 µs
Table 233. Examples of TIMEOUTA settings (max t
TIMEOUT
= 25 ms)
f
I2CCLK
TIMEOUTA[11:0] bits TIDLE bit TIMEOUTEN bit t
TIMEOUT
8 MHz 0x61 0 1 98 x 2048 x 125 ns = 25 ms
16 MHz 0xC3 0 1 196 x 2048 x 62.5 ns = 25 ms
Table 234. Examples of TIMEOUTB settings
f
I2CCLK
TIMEOUTB[11:0] bits TEXTEN bit t
LOW:EXT
8 MHz 0x1F 1 32 x 2048 x 125 ns = 8 ms
16 MHz 0x3F 1 64 x 2048 x 62.5 ns = 8 ms
Table 235. Examples of TIMEOUTA settings (max t
IDLE
= 50 µs)
f
I2CCLK
TIMEOUTA[11:0] bits TIDLE bit TIMEOUTEN bit t
TIDLE
8 MHz 0x63 1 1 100 x 4 x 125 ns = 50 µs
16 MHz 0xC7 1 1 200 x 4 x 62.5 ns = 50 µs

STMicroelectronics STM32WL5 Series Specifications

General

Brand	STMicroelectronics
Model	STM32WL5 Series
Category	Microcontrollers
Language	English