RM0453 Rev 5 305/1450
RM0453 Reset and clock control (RCC)
371
7.3 Low-power modes
AHB and APB peripheral clocks, including DMA clock, can be disabled by software.
Sleep and LPSleep modes stop the CPU clock. The memory interface clocks (flash memory
and SRAM1/2 interfaces) can be stopped during Sleep mode by software using the
SRAMxSMEN bits. The AHB to APB bridge clocks are disabled by hardware during Sleep
mode when all the clocks of the peripherals connected to them are disabled in the
peripheral SMEN bits.
Stop modes (Stop 0, Stop 1 and Stop 2) stop most clocks in the V
CORE
domain and disable
the PLLs, the MSI and the HSE32 oscillators. HSI16 may be kept running when requested
by the peripheral (USART1, USART2, LPUART1, I2C1, I2C2 or I2C3) that allows the wake-
up from Stop modes.
All U(S)ARTs, LPUARTs and I2Cs have the capability to enable the HSI16 oscillator even
when the MCU is in Stop mode (if HSI16 is selected as clock source for that peripheral).
All U(S)ARTs, LPUARTs and LPTIMs can also be driven by the LSE oscillator when the
system is in Stop mode (if LSE is selected as clock source for that peripheral) and the LSE
oscillator is enabled (LSEON). In that case, LSE remains always on in Stop mode (no
capability to turn on the LSE oscillator).
All LPTIMs can also be driven by the LSI oscillator when the system is in Stop mode (if LSI
is selected as clock source for that peripheral) and the LSI oscillator is enabled (LSION).
Standby and Shutdown modes stop all clocks in the V
CORE
domain and disable the PLL, the
HSI16, the MSI and the HSE32 oscillators.
The low-power modes can be overridden for debugging the CPU1 by setting the
DBG_SLEEP, DBG_STOP or DBG_STANDBY bits in the DBGMCU_CR register. In
addition, the EXTI CDBGPWRUPREQ events can be used to allow debugging the CPUs in
Stop modes (see the table below).
Table 62. Low-power debug configurations
Mode
CDBGPW
RUPREQ
DBGMCU Debug
CPU1 CPU2
DBG_
STANDBY
DBG_STOP
DBG_
SLEEP
CPU1 CPU2
Sleep x
(1)
x x x x Enabled Enabled
Stop 0
and
Stop 1
Disabled
x
x
Disabled
x
Disabled
-
(2)
Enabled Enabled
x
Disable
d
-
(3)
Disabled
Enabled Enabled
Stop 0,
Stop 1
and
Stop 2
x
Disable
d
Enabled Enabled
Disabled
Enabled Enabled
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