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STMicroelectronics STM32WL5 Series User Manual

STMicroelectronics STM32WL5 Series
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DMA request multiplexer (DMAMUX) RM0453
488/1450 RM0453 Rev 5
Figure 51. Synchronization mode of the DMAMUX request line multiplexer channel
Figure 52. Event generation of the DMA request line multiplexer channel
If EGE is enabled, the multiplexer channel generates a channel event, as a pulse of one
AHB clock cycle, when its DMA request counter is automatically reloaded with the value of
the programmed NBREQ field, as shown in Figure 51 and Figure 52.
MSv41974V1
Selected DMA request line transferred to the output
DMA request counter
dmamux_evtx
dmamux_req_outx
dmamux_syncx
Selected
dmamux_reqx
Synchronization event
Input DMA request line connected to output
321 044
DMA request counter underrun
DMA request counter auto-reload to NBREQ
Input DMA request line disconnected from output
Example: DMAMUX_CCRx configured with: NBREQ=4, SE=1, EGE=1, SPOL=01 (rising edge)
Not pending
DMA request pending
DMA requests served
MSv41975V1
DMA request counter
dmamux_evtx
23
DMA request counter reaches zero
Event is generated on the output
DMA request counter auto-reloads with NBREQ value
Example with: DMAMUX_CCRx configured with: NBREQ=3, SE=0, EGE=1
1 0 3 2 1 0 3 2 1 0
SE
EGE
Selected DMA request line transferred to the output
Selected
dmamux_reqx
dmamux_req_outx
Not pending
DMA request pending

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STMicroelectronics STM32WL5 Series Specifications

General IconGeneral
BrandSTMicroelectronics
ModelSTM32WL5 Series
CategoryMicrocontrollers
LanguageEnglish

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