RM0453 Rev 5 245/1450
RM0453 Power control (PWR)
285
Table 44. Low-power mode summary
Mode name Entry
Wake-up
source
(1)
Wake-up
system clock
Effect on clocks
Voltage
regulators
MR LPR
Sleep
(Sleep-now or
Sleep-on-exit)
WFI or return
from ISR
Any interrupt
Same as before
entering Sleep mode
CPU clock OFF
No effect on other clocks
or analog clock sources
ON ON
WFE Wake-up event
LPRun Set LPR bit Clear LPR bit
Same as LPRun
clock
None OFF ON
LPSleep
Set LPR bit +
WFI or return
from ISR
Any interrupt
Same as before
entering LPSleep
mode
CPU clock OFF
No effect on other clocks
or analog clock sources
OFF ON
Set LPR bit +
WFE
Wake-up event OFF ON
Stop 0
LPMS = 0b000 +
SLEEPDEEP bit
+ WFI or return
from ISR or WFE
Any EXTI line
(configured in the
EXTI registers).
Specific
peripherals
events
HSI16 when
STOPWUCK = 1 in
RCC_CFGR.
MSI with the
frequency before
entering the Stop
mode when
STOPWUCK = 0.
All clocks OFF
except HSI16, LSI and
LSE
ON
ON
Stop 1
LPMS = 0b001 +
SLEEPDEEP bit
+ WFI or return
from ISR or WFE
OFF
Stop 2
(with I2C3,
LPUART1,
LPTIM1,
SRAM1,
SRAM2)
LPMS = 0b010+
SLEEPDEEP bit
+ WFI or return
from ISR or WFE
Standby (with
SRAM2)
LPMS = 0b011+
Set RRS bit +
SLEEPDEEP bit
+ WFI or return
from ISR or WFE
Wake-up PVD,
RFIRQ, wake-up
RFBUSY, WKUP
pin edge, RTC
and TAMP event,
LSECSS,
external reset in
NRST pin,
IWDG reset
MSI 4 MHz
All clocks OFF
except LSI and LSE
Standby
LPMS = 0b011 +
Clear RRS bit +
SLEEPDEEP bit
+ WFI or return
from ISR or WFE
OFF OFF
Shutdown
LPMS = 0b1xx +
SLEEPDEEP bit
+ WFI or return
from ISR or WFE
WKUP pin edge,
RTC and TAMP
event, external
reset in NRST
pin
MSI 4 MHz
All clocks OFF
except LSE
OFF OFF
1. Refer to Table 45: Functionalities depending on system operating mode.
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