Universal synchronous/asynchronous receiver transmitter (USART/UART) RM0453
1116/1450 RM0453 Rev 5
35.3 USART extended features
• LIN master synchronous break send capability and LIN slave break detection capability
– 13-bit break generation and 10/11 bit break detection when USART is hardware
configured for LIN
• IrDA SIR encoder decoder supporting 3/16 bit duration for normal mode
• Smartcard mode
– Supports the T
= 0 and T = 1 asynchronous protocols for smartcards as defined in
the ISO/IEC 7816-3 standard
– 0.5 and 1.5 stop bits for Smartcard operation
• Support for Modbus communication
– Timeout feature
– CR/LF character recognition
35.4 USART implementation
The table(s) below describe(s) USART implementation. It(they) also include(s) LPUART for
comparison.
Table 239. USART / LPUART features
USART / LPUART modes/features
(1)
1. X = supported.
USART1/2 LPUART1
Hardware flow control for modem X X
Continuous communication using DMA X X
Multiprocessor communication X X
Synchronous mode (Master/Slave) X -
Smartcard mode X -
Single-wire Half-duplex communication X X
IrDA SIR ENDEC block X -
LIN mode X -
Dual clock domain and wake-up from low-power mode X X
Receiver timeout interrupt X -
Modbus communication X -
Auto baud rate detection X -
Driver Enable X X
USART data length 7, 8 and 9 bits
Tx/Rx FIFO X X
Tx/Rx FIFO size 8
Wake-up from Stop mode X
(2)
2. Wake-up supported from Stop 0 and Stop 1 modes.
X
(3)
3. Wake-up supported from Stop 0, Stop 1 and Stop 2 modes.
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