RM0453 Rev 5 283/1450
RM0453 Power control (PWR)
285
6.6.22 PWR RSS command register (PWR_RSSCMDR)
This register is only reset by a power-on reset (not reset on NRST and exit from Standby).
Address offset: 0x098
Reset value: 0x0000 0000
6.6.23 PWR register map
Bits 14:0 Reserved, must be kept at reset value.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. RSSCMD[7:0]
rw rw rw rw rw rw rw rw
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:0 RSSCMD[7:0]: RSS command
Define a command to be executed by the RSS.
Table 56. PWR register map and reset values
Offset Register name
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0x000
PWR_CR1
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
LPR
Res.
Res.
Res.
VOS [1:0]
DBP
Res.
Res.
FPDS
FPDR
SUBGHZSPINSSSEL
LPMS
[2:0]
Reset value 0 010 000000
0x004
PWR_CR2
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
PVME3
Res.
Res.
PLS [2:0]
PVDE
Reset value 00000
0x008
PWR_CR3
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
EIWUL
EC2H
EWRFIRQ
Res.
EWRFBUSY
APC
RRS
EWPVD
ULPEN
Res.
Res.
Res.
Res.
EWUP3
EWUP2
EWUP1
Reset value 100 00000 000
0x00C
PWR_CR4
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
C2BOOT
Res.
Res.
Res.
WRFBUSYP
Res.
VBRS
VBE
Res.
Res.
Res.
Res.
Res.
WP3
WP2
WP1
Reset value 0 0 0 0 0 0 0
0x010
PWR_SR1
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
WUFI
C2HF
Res.
Res.
WRFBUSYF
Res.
Res.
WPVDF
Res.
Res.
Res.
Res.
Res.
WUF3
WUF2
WUF1
Reset value 0000 000
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