Reset and clock control (RCC) RM0453
308/1450 RM0453 Rev 5
Bit 17 HSERDY: HSE32 clock ready flag
This bit is set and cleared by hardware to indicate that the HSE32 oscillator is stable or not.
0: HSE32 oscillator not ready
1: HSE32 oscillator ready
Note: Once HSEON is cleared, HSERDY goes low after six HSE32 clock cycles.
Bit 16 HSEON: HSE32 clock enable for CPUs
This bit is set and cleared by software. It is also cleared by hardware to stop the HSE32
oscillator when entering Stop, Standby or Shutdown mode. This bit cannot be reset if the
HSE32 oscillator is used directly or indirectly as system clock. The HSE32 oscillator must be
disabled before entering LPRun mode.
0: HSE32 oscillator for CPUs disabled
1: HSE32 oscillator for CPUs enabled
Note: The sub-GHz radio has its own HSE32 oscillator enable in the sub-GHz radio.
Bits 15:13 Reserved, must be kept at reset value.
Bit 12 HSIKERDY: HSI16 kernel clock ready flag for peripherals requests
This bit is set and cleared by hardware to indicate that the HSI16 oscillator is stable or not,
when enabled by HSIKERON or a peripheral kernel clock request. This bit is not set when
HSI16 is enabled by software with HSION setting or by wake-up from Standby.
0: HSI16 oscillator not ready
1: HSI16 oscillator ready
Note: Once HSIKERON is cleared, HSIKERDY goes low after six HSI16 clock cycles.
Bit 11 HSIASFS: HSI16 automatic start from Stop modes
This bit is set and cleared by software. When the system wake-up clock is MSI, this bit is
used to wake-up the HSI16 in parallel to the system wake-up clock.
0: HSI16 not enabled by hardware when exiting Stop modes with MSI as wake-up clock
1: HSI16 enabled by hardware when exiting Stop mode with MSI as wake-up clock
Bit 10 HSIRDY: HSI16 clock ready flag
This bit is set and cleared by hardware to indicate that HSI16 oscillator is stable or not. It is
set only when HSI16 is enabled by software by setting HSION, or by wake-up from Stop
modes and HSIASFS is enabled. After wake-up from Stop modes, this bit is read 1 once the
HSI16 is ready. This bit is not set when HSI16 is enabled by HSIKERON or by a peripheral
request.
0: HSI16 oscillator not ready
1: HSI16 oscillator ready
Note: Once HSION is cleared, HSIRDY goes low after six HSI16 clock cycles.
Bit 9 HSIKERON: HSI16 enable for peripheral kernel clocks
This bit is set and cleared by software to force HSI16 on even in Stop modes. HSI16 enabled
by HSIKERON can only feed USARTs, LPUARTs and I2Cs peripherals configured with
HSI16 as kernel clock. Keeping HSI16 on in Stop modes avoids slowing down the
communication speed because of the HSI16 startup time. This bit has no effect on HSION
value.
0: No effect on HSI16 oscillator
1: HSI16 oscillator forced on even in Stop modes
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