AMD K5

Dispatch and Execution Timing 4-21
18524C/0—Nov1996 AMD-K5 Processor Technical Reference Manual
FICOM int_16 0_1x_11011110_010_xxx M
ld 1/1
fpfill 1/3/7
fadd 1/3/7
fpfill 2/7/9
fmv 2/7/9
FICOM int_32 0_1x_11011010_010_xxx M
ld 1/1
fpfill 1/3/7
fadd 1/3/7
fpfill 2/7/9
fmv 2/7/9
FICOMP int_16 0_1x_11011110_011_xxx M
ld 1/1
fpfill 1/3/7
fadd 1/3/7
fpfill 2/7/9
fmv 2/7/9
FICOMP int_32 0_1x_11011010_011_xxx M
ld 1/1
fpfill 1/3/7
fadd 1/3/7
fpfill 2/7/9
fmv 2/7/9
FILD int_16 0_1x_11011111_000_xxx F
ld 1/1
fpfill 1/3/7
fadd 1/3/7
FILD int_32 0_1x_11011011_000_xxx F
ld 1/1
fpfill 1/3/7
fadd 1/3/7
FILD int_64 0_1x_11011111_101_xxx M
ld 1/1
ld 1/2
fpfill 1/4/8
fadd 1/4/8
FIMUL int_16 0_1x_11011110_001_xxx M
ld 1/1
fpfill 1/3/7
fadd 1/3/7
fpfill 2/7/11
fmul 2/7/11
FIMUL int_32 0_1x_11011010_001_xxx M
ld 1/1
fpfill 1/3/7
fadd 1/3/7
fpfill 2/7/11
fmul 2/7/11
Table 4-3. Floating-Point Instructions (continued)
Instruction Mnemonic Opcode Format
Fastpath or
Microcoded
Execution
Unit Timing