AMD K5

Dispatch and Execution Timing 4-23
18524C/0—Nov1996 AMD-K5 Processor Technical Reference Manual
FISUBR int_32 0_1x_11011010_101_xxx M
ld 1/1
fpfill 1/3/7
fadd 1/3/7
fpfill 2/7/10
fadd 2/7/10
FLD real_32 0_1x_11011001_000_xxx F
ld 1/1
fpfill 1/3/5
fmv 1/3/5
FLD real_64 0_1x_11011101_000_xxx M
ld 1/1
ld 1/2
fpfill 1/4/6
fmv 1/4/6
FLD real_80 0_1x_11011011_101_xxx M
ld 1/1
ld 1/2
fpfill 1/6/8
fmv 1/6/8
FLD ST(i) 0_0x_11011001_000_xxx F
fpfill 1/2/4
fmv 1/2/4
nop 1/1
FMUL ST, ST(i) 0_0x_11011000_001_xxx F
fpfill 1/2/8
fmul 1/2/8
FMUL ST(i), ST 0_0x_11011100_001_xxx F
fpfill 1/2/8
fmul 1/2/8
FMUL real_32 0_1x_11011000_001_xxx F
ld 1/1
fpfill 1/3/7
fmul 1/3/7
FMUL real_64 0_1x_11011100_001_xxx M
ld 1/1
ld 1/2
fpfill 1/4/10
fmul 1/4/10
FMULP ST, ST(i) 0_0x_11011110_001_xxx F
fpfill 1/2/8
fmul 1/2/8
FMULP ST(i), ST 0_0x_11011110_001_xxx F
fpfill 1/2/8
fmul 1/2/8
FNOP 0_0x_11011001_010_xxx F
alu 1/1/2
alu 1/1/2
FRNDINT 0_0x_11011001_111_xxx F
fpfill 1/2/9
fadd 1/2/9
Table 4-3. Floating-Point Instructions (continued)
Instruction Mnemonic Opcode Format
Fastpath or
Microcoded
Execution
Unit Timing