Dispatch and Execution Timing 4-25
18524C/0—Nov1996 AMD-K5 Processor Technical Reference Manual
FSUBR ST, ST(i) 0_0x_11011000_101_xxx F
fpfill 1/2/5
fadd 1/2/5
FSUBR ST(i), ST 0_0x_11011100_101_xxx F
fpfill 1/2/5
fadd 1/2/5
FSUBR real_32 0_1x_11011000_101_xxx F
ld 1/1
fpfill 1/3/6
fadd 1/3/6
FSUBR real_64 0_1x_11011100_101_xxx M
ld 1/1
ld 1/2
fpfill 1/4/7
fadd 1/4/7
FSUBRP ST(i), ST 0_0x_11011110_101_xxx F
fpfill 1/2/5
fadd 1/2/5
FTST 0_0x_11011001_100_xxx F
fpfill 1/2/4
fmv 1/2/4
FUCOM ST(i) 0_0x_11011101_100_xxx F
fpfill 1/2/4
fmv 1/2/4
FUCOMP ST(i) 0_0x_11011101_101_xxx F
fpfill 1/2/4
fmv 1/2/4
nop 1/1
FUCOMPP 0_0x_11011010_101_xxx F
fpfill 1/2/4
fmv 1/2/4
nop 1/1
FWAIT 0_xx_10011011_xxx_xxx Falu1/1
FXAM 0_0x_11011001_100_xxx F
fpfill 1/2/4
fmv 1/2/4
FXCH ST(i) 0_0x_11011001_001_xxx Fbrn1/1
FXTRACT 0_0x_11011001_110_xxx M
fpfill 1/2/4
fmv 1/2/4
fpfill 2/3/11
fadd 2/3/11
fpfill 3/4/6
fmv 3/4/6
Table 4-3. Floating-Point Instructions (continued)
Instruction Mnemonic Opcode Format
Fastpath or
Microcoded
Execution
Unit Timing