5-80 Bus Interface
AMD-K5 Processor Technical Reference Manual 18524C/0—Nov1996
If an unmasked floating-point exception is pending and the tar-
get instruction is considered error-insensitive, then the proces-
sor ignores the floating-point exception and continues with the
execution of the target instruction.
FERR is not affected by the state of the NE bit or IGNNE.
FERR is always asserted at the instruction boundary of the tar-
get instruction that follows the floating-point instruction that
caused the unmasked floating-point exception.
This signal is provided to allow the system logic to handle
exceptions in a manner consistent with IBM-compatible PC/AT
systems.
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