RM0453 Rev 5 1047/1450
RM0453 Tamper and backup registers (TAMP)
1048
33.6.9 TAMP monotonic counter register (TAMP_COUNTR)
Address offset: 0x040
Backup domain reset value: 0x0000 0000
System reset: not affected
33.6.10 TAMP backup x register (TAMP_BKPxR)
Address offset: 0x100 + 0x04 * x, (x = 0 to 19)
Backup domain reset value: 0x0000 0000
System reset: not affected
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
COUNT[31:16]
rrrrrrrrrrrrrrrr
1514131211109876543210
COUNT[15:0]
rrrrrrrrrrrrrrrr
Bits 31:0 COUNT[31:0]:
This register is read-only only and is incremented by one when a write access is done to this
register. This register cannot roll-over and is frozen when reaching the maximum value.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
BKP[31:16]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
BKP[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw w rw rw
Bits 31:0 BKP[31:0]:
The application can write or read data to and from these registers.
They are powered-on by V
BAT
when V
DD
is switched off, so that they are not reset by System
reset, and their contents remain valid when the device operates in low-power mode.
In the default configuration this register is reset on a tamper detection event. It is forced to
reset value as long as there is at least one internal or external tamper flag being set. This
register is also reset when the readout protection (RDP) is disabled.
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