RM0453 Rev 5 417/1450
RM0453 General-purpose I/Os (GPIO)
431
10.4.15 GPIOC pull-up/pull-down register (GPIOC_PUPDR)
Address offset: 0x080C
Reset value: 0x0000 0000
Bits 13:12 OSPEED6[1:0]: Port PC6 output speed configuration
Bits 11:10 OSPEED5[1:0]: Port PC5 output speed configuration
Bits 9:8 OSPEED4[1:0]: Port PC4 output speed configuration
Bits 7:6 OSPEED3[1:0]: Port PC3 output speed configuration
Bits 5:4 OSPEED2[1:0]: Port PC2 output speed configuration
Bits 3:2 OSPEED1[1:0]: Port PC1 output speed configuration
Bits 1:0 OSPEED0[1:0]: Port PC0 output speed configuration
These bits are written by software to configure the I/O output speed.
00: Low speed
01: Medium speed
10: Fast speed
11: High speed
Note: Refer to the device datasheet for the frequency specifications and the power supply
and load conditions for each speed.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
PUPD15[1:0] PUPD14[1:0] PUPD13[1:0] Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
rw rw rw rw rw rw
1514131211109876543210
Res. Res. PUPD6[1:0] PUPD5[1:0] PUPD4[1:0] PUPD3[1:0] PUPD2[1:0] PUPD1[1:0] PUPD0[1:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:30 PUPD15[1:0]: Port PC15 pull configuration
Bits 29:28 PUPD14[1:0]: Port PC14 pull configuration
Bits 27:26 PUPD13[1:0]: Port PC13 pull configuration
Bits 25:14 Reserved, must be kept at reset value.
Bits 13:12 PUPD6[1:0]: Port PC6 pull configuration
Bits 11:10 PUPD5[1:0]: Port PC5 pull configuration
Bits 9:8 PUPD4[1:0]: Port PC4 pull configuration
Bits 7:6 PUPD3[1:0]: Port PC3 pull configuration
Bits 5:4 PUPD2[1:0]: Port PC2 pull configuration
Bits 3:2 PUPD1[1:0]: Port PC1 pull configuration
Bits 1:0 PUPD0[1:0]: Port PC0 pull configuration
These bits are written by software to configure the I/O pull-up or pull-down.
00: No pull-up, pull-down
01: Pull-up
10: Pull-down
11: Reserved
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